This invention relates to three dimensional integrated circuits and more particularly to a method of manufacturing three dimensional integrated circuits from compatible co-fireable materials.
Various types of multi-layer circuits have previously been proposed. In general these have comprised individual sheets of a dielectric material with electrical conductors arranged in some desired pattern on the surface of each of the sheets. Provision for inter-connecting parts of the different layers is usually made by punching holes at desired locations in the dielectric sheet, placing wires in these holes and filling the remainder of the holes with solder.
In other methods of manufacturing semiconductor integrated devices of this type the ceramic green sheets are prepared and communicating feed through holes are mechanically punched through them. A metalizing paste is prepared and screened on the sheet and in the holes in a desired circuit pattern. After laminating the registered and stacked green sheets into an integral whole with the circuit patterns buried in them, they are sintered to burn off the binder material in the sheets and to densify the sheets. The metalized paste forms porous capillaries communicating within the unitized whole which are subsequently filled with a conductive material by capillary float techniques. These means of fabrication, as is readily apparent, are cumbersome and make it difficult to fabricate the desired integrated circuit.